According to the characteristics of the PWM, the following points should be noted when using the timing/counter output PWM of the ATmega128: 1. First, according to the actual situation, determine the PWM frequency range that needs to be output. This frequency is related to the controlled object. If the output PWM wave is used to control the brightness of the lamp, because the human eye can not distinguish the frequency above 42Hz, the frequency of the PWM should be higher than 42Hz. Otherwise, the human eye will perceive the flickering of the lamp. 2. Then determine the PWM operation of the ATmega128 timer/counter based on the desired PWM frequency range. The AVR timing/counter PWM mode can be divided into two categories, fast PWM and frequency (phase) adjustment PWM. 3. Fast PWM can be compared to a high frequency PWM output, but the duty cycle adjustment accuracy is slightly worse. At this time, the counter only works in one-way forward counting mode. The upper limit value of the counter determines the PWM frequency, and the value of the compare match register determines the size of the duty cycle. The PWM frequency is calculated as: PWM frequency = system clock frequency / (divisor coefficient * (1 + counter upper limit value)) 4. The fast PWM mode is suitable for applications requiring a high output PWM frequency, but with a fixed frequency and low duty cycle adjustment accuracy. 5. Frequency (Phase) Adjustment The PWM mode's duty cycle adjustment accuracy is high, but the output frequency is relatively low because the counter only works in bidirectional counting mode. Similarly, the upper limit value of the counter determines the frequency of the PWM. The value of the compare match register determines the size of the duty cycle. The PWM frequency is calculated as: PWM frequency = system clock frequency / (divisor coefficient * 2 * counter upper limit value)) 6. The phase-adjusted PWM mode is suitable for applications requiring a low output PWM frequency, but with a fixed frequency and a high duty-cycle adjustment accuracy. When adjusting the duty cycle, the phase of the PWM also changes accordingly (Phase Correct). 7. Frequency and phase adjustment The PWM mode is suitable for applications that require low output PWM frequency, need to change the output frequency, and require high accuracy of duty cycle adjustment. At this time, it should be noted that not only will the phase of the PWM be changed when the duty cycle is adjusted, but once the counter's upper limit is changed, that is, when the output frequency of the PWM is changed, the duty cycle and phase of the PWM will be correspondingly changed. Follow the change (Phase and Frequency Correct). 8. In PWM mode, the upper limit of the counter has a fixed 0xFF (8-bit T/C); 0xFF, 0x1FF, 0x3FF (16-bit T/C). Or user-set 0x0000-0xFFFF, the set value in the 16-bit T/C ICP or OCRA register. The ratio of the compare match register value to the counter upper limit value is the duty cycle. A design example is given below. In the example, the PWM method is used to generate a sine wave of about 1 KHz with an amplitude of 0-Vcc/2. First, establish a sine wave sample table according to the following formula. The sample table divides a sine wave cycle into 128 points, and each point is quantified by 7 bits (127 corresponds to the highest amplitude Vcc/2): f(x) = 64 + 63 * sin(2πx/180) x∈[0...127] If 128 samples are used in one sine wave period, the frequency of the 1 kHz sine wave PWM is 128 KHz. In fact, according to the sampling theorem that the sampling frequency is at least twice the signal frequency, the theoretical value of the PWM frequency can be 2 kHz. Consider improving PWM output accuracy as much as possible. The actual design uses a PWM frequency of 16 KHz, which means that 16 sine wave samples are output in a sine wave cycle (1 KHz). This means that in the 128-point sine wave sample table, a point is taken every 8 o'clock as the PWM output. The program uses the 8-bit T/C0 of the ATmega128. The operation mode is the phase-adjusted PWM mode output. The system clock is 8MHz and the frequency division factor is 1. It can generate the highest PWM frequency: 8000000Hz / 510 = 15686Hz. Every 16 outputs form a period sine wave, the frequency of the sine wave is 980.4Hz. The PWM is output from the OC0 (PB4) pin. The reference procedure is as follows (ICCAVR). //ICC-AVR applicaTIon builder : 2004-08 // Target : M128 // Crystal: 8.0000Mhz #i nclude #i nclude #pragma data:code // 128 point sine wave sample table Const unsigned char auc_SinParam[128] = { 64,67,70,73,76,79,82,85,88,91,94,96,99,102,104,106,109,111,113,115,117,118,120,121, 123,124,125,126,126,127,127,127,127,127,127,127,126,126,125,124,123,121,120,118, 117,115,113,111,109,106,104,102,99,96,94,91,88,85,82,79,76,73,70,67,64,60,57,54,51,48, 45, 42, 39, 36, 33, 31, 28, 25, 23, 21, 18, 16, 14, 12, 10, 9, 7, 6, 4, 3, 2, 1, 1, 0, 0, 0,0,0,0,0,1,1,2,3,4,6, 7,9,10,12,14,16,18,21,23,25,28,31,33,36,39,42,45,48,51,54,57,60}; #pragma data:data Unsigned char x_SW = 8, X_LUT = 0; #pragma interrupt_handler TImer0_ovf_isr:17 Void TImer0_ovf_isr(void) { X_LUT += x_SW; // new sample pointer If (X_LUT > 127) X_LUT -= 128; // sample pointer adjustment OCR0 = auc_SinParam[X_LUT]; // Sampling point pointer to compare match register } Void main(void) { DDRB |= 0x10; // PB4(OC0) output TCCR0 = 0x71; // Phase-adjusted PWM mode, division factor = 1, positive control OC0 TIMSK = 0x01; // T/C0 overflow interrupt enable SEI(); // Enable global interrupt While(1) {...}; } Each time the service of the counter overflow interrupt takes out a sample value of a sine wave to the compare match register, it is used to adjust the pulse width of the next PWM, so that a PWM square wave modulated by a sine wave is output on the PB4 pin. When the output of PB4 passes through a low-pass filter, a 980.4Hz sine wave is obtained. To obtain a more accurate 1 kHz sine wave, use timer/counter T/C1, select operating mode 10, and set ICR1=250 as the upper limit of the counter. On ATMEL's website, an application design reference (AVR314.pdf) using a timer/counter to implement dual tone dialing is given. The reader can learn how to better design and use the PWM function. f(x) = 64 + 63 * sin(2πx/128) x∈[0...127] I have also had this problem for a long time. In the Application Note numbered AVR314, this is very detailed. In this note, since the sine wave is eventually used for high and low frequency superposition to generate the DTMF signal, 7 bits are used to store the sine table. 7-bit maximum is 127 The range of f(x) = sin(x) is [0...1], so 63 * sin(2πx/128) enlarges the range. Plus 64, the value will be all up positive, to meet the storage requirements. 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A, timing / counter PWM design points